November 2013

FQB11N40C

N-Channel QFET® MOSFET

400 V, 10.5 A, 530 mΩ

Description

©2004 Fairchild Semiconductor Corporation

FQB11N40C Rev. C0

www.fairchildsemi.com

1

These N-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe,

DMOS technology. This advanced

technology has been especially tailored to minimize on-

state resistance, provide superior switching performance,

and withstand high energy pulse in the avalanche and

commutation mode. These devices are well suited for high

efficiency switched mode power supplies, active power

factor correction, electronic lamp ballasts based on half

bridge topology.

Features

Absolute Maximum Ratings T

C = 25

oC unless otherwise noted.

Thermal Characteristics

Symbol

Parameter

FQB11N40CTM

Unit

RJC

Thermal Resistance, Junction to Case, Max.

0.93

oC/W

RJA

Thermal Resistance, Junction to Ambient (minimum pad of 2 oz copper), Max.

62.5

Thermal Resistance, Junction to Ambient (*1 in2 pad of 2 oz copper), Max.

40

G

S

D

D2-PAK

G

S

D

• 10.5 A, 400V, RDS(on) = 530 mΩ (Max.) @ VGS = 10 V,

ID = 5.25 A

• Low Gate Charge (Typ. 28 nC)

• Low Crss (Typ. 85 pF)

• 100% Avalanche Tested

Symbol

Parameter

FQB11N40CTM

Unit

VDSS

Drain-Source Voltage

400

V

ID

Drain Current

- Continuous (TC = 25°C)

10.5

A

- Continuous (TC = 100°C)

6.6

A

IDM

Drain Current

- Pulsed

(Note 1)

42

A

VGSS

Gate-Source Voltage

± 30

V

EAS

Single Pulsed Avalanche Energy

(Note 2)

360

mJ

IAR

Avalanche Current

(Note 1)

11

A

EAR

Repetitive Avalanche Energy

(Note 1)

13.5

mJ

dv/dt

Peak Diode Recovery dv/dt

(Note 3)

4.5

V/ns

PD

Power Dissipation (TC = 25°C)

135

W

- Derate above 25°C

1.07

W/°C

TJ, TSTG

Operating and Storage Temperature Range

-55 to +150

°C

TL

Maximum Lead Temperature for Soldering,

1/8" from Case for 5 Seconds

300

°C