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AFE5804 Scheda tecnica(PDF) 68 Page - Texas Instruments |
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AFE5804 Scheda tecnica(HTML) 68 Page - Texas Instruments |
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68 / 82 page ![]() −140 −130 −120 −110 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 0 5 10 15 20 25 30 35 40 Frequency (MHz) SNR = 77.9 dBFS SINAD = 77.9 dBFS SFDR = 93.13 dBc THD = −96 dBc 2 Channels averaged −140 −130 −120 −110 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 10 20 30 40 Frequency (MHz) SNR = 76.1 dBFS SINAD = 75.7 dBFS SFDR = 87 dBc THD =84.7 dBc −140 −130 −120 −110 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 0 5 10 15 20 Frequency (MHz) SNR = 78.2 dBFS SINAD = 78.2 dBFS Decimate by 2 Filter Enabled 68 ADS5294 SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018 www.ti.com Product Folder Links: ADS5294 Submit Documentation Feedback Copyright © 2011–2018, Texas Instruments Incorporated Typical Application (continued) 10.2.3 Application Curves The ADS5294 is a low-power 80-MSPS 8-Channel ADC. The digital processing block of the ADS5294 integrates several commonly used digital features for improving system performance. The device includes a digital filter module that has built-in decimation filters (with lowpass, highpass and bandpass characteristics). The decimation rate is programmable (by 2, by 4, or by 8). This rate is useful for narrow-band applications, where the filters are used to conveniently improve SNR and knock-off harmonics, while at the same time reducing the output data rate. The device also includes an averaging mode where two channels (or even four channels) are averaged to improve SNR. The below application curves show that about 2 dB SNR improvment can be achieved by either enabling 2X decimation or 2-CH averaging features. Fs = 80 MSPS Figure 66. SNR without Decimation Enabled Fs = 80 MSPS Figure 67. SNR With Decimation Enabled Fs = 80 MSPS Figure 68. SNR With 2-CH Average Enabled |
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