MB85RC256V datasheet(8/39 Pages) RAMXEED

8 / 39 page

MB85RC256V

DS501-00017-11v2-E

• Current Address Read

When the previous write or read operation finishes successfully up to the stop condition and assumes the

last accessed address is “n”, then the address at “n+1” is read by sending the following command unless

turning the power off. If the memory address is last address, the address counter will roll over to 0000H. The

current address in memory address buffer is undefined immediately after the power is turned on.

• Random Read

The one byte of data from the memory address saved in the memory address buffer can be read out

synchronously to SCL by specifying the address in the same way as for a write, and then issuing another

start condition and sending the Device Address Word (R/W “1” input).

The final NACK (SDA is the "H" level) is issued by the receiver that receives the data. In this case, this bit

is issued by the master side.

Start Condition

Stop Condition

ACK (SDA is the "L" level)

NACK (SDA is the "H" level)

A2 A1 A0

N P

Read

Data 8bits

(n+1) address

010

Access from master

Access from slave

Start Condition

Stop Condition

ACK (SDA is the "L" level)

NACK (SDA is the "H" level)

A2 A1 A0

Address

High 8bits

Address

Low 8bits

010

A2 A1 A0

010

Read

Data 8bits

Access from master

Access from slave

MB85RC256V Scheda tecnica(PDF) 8 Page - RAMXEED LIMITED