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L9942 Scheda tecnica(PDF) 13 Page - STMicroelectronics |
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L9942 Scheda tecnica(HTML) 13 Page - STMicroelectronics |
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13 / 40 page ![]() L9942 Device description Doc ID 11778 Rev 7 13/40 2.13 Decay modes Figure 4. Decay modes A SLOW DECAY Internal PWM_CLK ON B Load Current Detail A: SWITCH ON AND SLOW DECAY Step Limit HS Detail B: MIXED DECAY T When limit is reached so fast decay duration time is set by DM1 DM2 register0 TFT Filter time for the purpose of switch off delay in on mode is set by FT register6 TCC T FT DM2 DM1 DM0 MODE 0 0 0 register0 Time Time slow DM2 DM1 DM0 MODE CURVE X 0 1 register0 X 1 0 X 1 1 MD1 T MD2 T mc T Cross current protection time is set by SR1 SR0 register0 MD1 Filter time for purpose of delay when decay mode has to change after limit under-run CC T TCC T VS on on VS on on VS on on MDx= mc T CC + 2T = T FT T MD TFT VS on on VS on SLOW DECAY MD2 or T Fast decay is caused by current through internal diodes during cross current protection time. VS OFF ON OFF OFF OFF FAST DECAY MIXED DECAY TMDx Time CC T SLOW DECAY with delay Load Current Load Current Step Limit LS Time TFT CC T SLOW DECAY after current undershoot mc T Load Current FAST DECAY CC T CC T > TB TB Blank time of load current comparator FAST DECAY T BCC =T |
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