L9965P-FN datasheet(40/104 Pages) STMICROELECTRONICS

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Diagnostic steps can be individually enabled/disabled via dedicated NVM configuration bits:

•

ADC_HWSC_EN = 1 schedules the HWSC for cyclic execution

–

ADC_HWSC_NCYCLE field specifies the periodicity of execution

•

LEAK_EN = 1 schedules the VRCM check and pyro outputs leakage test for cyclic execution

–

LEAK_NCYCLE field specifies the periodicity of execution

•

PYRO_RES_EN = 1 schedules the pyro igniter resistance measurement for cyclic execution

–

PYRO_RES_NCYCLE field specifies the periodicity of execution

•

FET_EN = 1 schedules the pyro deployment FETs test for cyclic execution

–

FET_NCYCLE field specifies the periodicity of execution

•

ER_CAP_EN = 1 schedules the ER capacitor diagnostic for cyclic execution

–

ER_CAP_NCYCLE field specifies the periodicity of execution

The NVM configuration guarantees the execution of the diagnostics (CYC_DIAG_RUNNING in

CYCLIC_DIAG_STATUS register set to 1) even in the absence of MCU supervision. The routine is executed only

after the NVM has been downloaded.

When the device is in full power, a new routine is inhibited if a fail in integrity check occurs

(CYC_CFG_CRC_FAIL bit set).

The internal cycle counter CYC_DIAG_NCYCLE bit field is incremented at the end of each diagnostic sweep. In

case it reaches saturation, it rolls over restarting from zero.

3.7.2

Routine steps

The following sections list all the diagnostic steps performed during the diagnostic routine.

3.7.2.1

ABIST (analog built-in self-test)

This step aims at verifying the proper behavior of analog comparators.

In cyclic diagnostic it is not possible to disable the ABIST, so it runs at every cycle.

In case of fault, the ABIST_FAIL bit in the INTERNAL_STATUS register is set and the FAULTN pin is asserted.

The ABIST diagnostic step duration is tABIST.

Note:

In cyclic diagnostic the ABIST cannot be disabled, so it runs at every cycle.

3.7.2.2

HWSC (hardware self-check)

This step aims at verifying the integrity of conversion paths from an input to the ADCs.

The following paths are checked:

•

PF vs PR to check the integrity of differential measurement pre-deployment.

•

PF vs PR to check the integrity of differential measurement post-deployment.

•

VRCM vs PGND to check the integrity of VRCM measurement.

This test does not require any previous diagnostic to be safely executed.

Figure 19. Differential ADC HWSC

CH-

CH+

VREF2

ADC

MAIN

BGMAIN

BGMON

DIVIDER &

LVL

SHIFTER

VREF1

BGMON

L9965P

Functional description

DS14702 - Rev 4

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