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STA1085 Scheda tecnica(PDF) 78 Page - STMicroelectronics |
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STA1085 Scheda tecnica(HTML) 78 Page - STMicroelectronics |
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78 / 127 page ![]() Electrical Characteristics STA108x, STA109x 78/127 DS13319 Rev 2 4.13 SD/MMC Timings Figure 17. SD/MMC Timing Diagrams: Data input/output Note: SD/MMC Timings Source: JEDEC Standard No. 84-A44 Invalid Invalid DATA DATA OUTPUT INPUT SDMMC_CLK DATA DATA tODLY tTLH tTHL tIH tWL tWH tPP 50% VDD 50% VDD min (VIH) max (VIL) min (VIH) max (VIL) min (VOH) max (VOL) tISU Data is always sampled, by the card or the controller, on the rising edge of the clock. |
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