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TCA6408ARSVR Scheda tecnica(PDF) 22 Page - Texas Instruments

Il numero della parte TCA6408ARSVR
Spiegazioni elettronici  TCA6408A Low-Voltage 8-Bit I2C and SMBus I/O Expander With Interrupt Output, Reset, and Configuration Registers
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
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TCA6408ARSVR Scheda tecnica(HTML) 22 Page - Texas Instruments

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background image
SCL
SDA
MSB
Bit
Bit
Bit
Bit
Bit
Bit
LSB
Byte: 1010 1010 ( 0xAAh )
1
0
1
0
1
0
1
0
SDA line stable while SCL line is high
ACK
ACK
Figure 8-4. Bit Transfer
Table 8-2. Interface Definition
BYTE
BIT
7 (MSB)
6
5
4
3
2
1
0 (LSB)
I2C target address
L
H
L
L
L
L
ADDR
R/ W
I/O data bus
P7
P6
P5
P4
P3
P2
P1
P0
8.5.2 Bus Transactions
Data must be sent to and received from the target devices, and this is accomplished by reading from or writing to
registers in the target device.
Registers are locations in the memory of the target which contain information, whether it be the configuration
information or some sampled data to send back to the controller. The controller must write information to these
registers in order to instruct the target device to perform a task.
While it is common to have registers in I2C targets, note that not all target devices will have registers. Some
devices are simple and contain only 1 register, which may be written to directly by sending the register data
immediately after the target address, instead of addressing a register. An example of a single-register device
would be an 8-bit I2C switch, which is controlled via I2C commands. Since it has 1 bit to enable or disable
a channel, there is only 1 register needed, and the controller merely writes the register data after the target
address, skipping the register number.
8.5.2.1 Writes
To write on the I2C bus, the controller will send a START condition on the bus with the address of the target,
as well as the last bit (the R/ W bit) set to 0, which signifies a write. After the target sends the acknowledge
bit, the controller will then send the register address of the register to which it wishes to write. The target will
acknowledge again, letting the controller know it is ready. After this, the controller will start sending the register
data to the target until the controller has sent all the data necessary (which is sometimes only a single byte), and
the controller will terminate the transmission with a STOP condition.
Figure 8-5 shows an example of writing a single byte to a target register.
TCA6408A
SCPS192E – APRIL 2009 – REVISED JANUARY 2023
www.ti.com
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