M45PE10-VMP6TP datasheet(20/47 Pages) NUMONYX

20 / 47 page

Instructions

M45PE10

20/47

Figure 8.

Read identification (RDID) instruction sequence and data-out sequence

The unique ID code is available only in the T9HX process (see Important note on page 6).

6.4

Read status register (RDSR)

The read status register (RDSR) instruction allows the status register to be read. The status

When one of these cycles is in progress, it is recommended to check the write in progress

(WIP) bit before sending a new instruction to the device. It is also possible to read the status

The status bits of the status register are as follows:

6.4.1

WIP bit

The write in progress (WIP) bit indicates whether the memory is busy with a write, program

or erase cycle. When set to ‘1’, such a cycle is in progress, when reset to ‘0’ no such cycle is

in progress.

6.4.2

WEL bit

The write enable latch (WEL) bit indicates the status of the internal write enable latch. When

set to ‘1’ the internal write enable latch is set, when set to ‘0’ the internal write enable latch is

reset and no write, program or erase instruction is accepted.

456789 10 11 12 13 14 15

Instruction

AI06809c

Manufacturer identification

High Impedance

MSB

Device identification

MSB

15 14 13

16 17 18

28 29 30 31

MSB

UID

Table 5.

Status register format

WEL (1)

WEL and WIP are volatile read-only bits (WEL is set and reset by specific instructions; WIP is

automatically set and reset by the internal logic of the device).

WIP(1)

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