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M58PR512LE Scheda tecnica(PDF) 79 Page - Numonyx B.V |
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M58PR512LE Scheda tecnica(HTML) 79 Page - Numonyx B.V |
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79 / 123 page ![]() M58PR512LE, M58PR001LE DC and AC parameters 79/123 Figure 15. Single synchronous read AC waveforms Figure 16. Clock input AC waveform AI12863c E G A0-Amax(1) L WAIT(2,3) K(2) VALID ADDRESS tGLQV tAVKH tLLKH tELKH Hi-Z tELQX tKHQV Notes: 1. Amax is equal to A24 in the M58PR512LE and to A25 in the M58PR001LE. 2. The WAIT signal is configured to be active during wait state. WAIT signal is active Low. 3. Address latched and data output on the rising clock edge. tGLQX tKHTV DQ0-DQ15 VALID Hi-Z tELQV tGLTV tGHTZ tLLTV AI06981 tKHKH tf tr tKHKL tKLKH |
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