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SAP5SD-A-G1-R Scheda tecnica(PDF) 41 Page - Renesas Technology Corp |
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SAP5SD-A-G1-R Scheda tecnica(HTML) 41 Page - Renesas Technology Corp |
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41 / 67 page ![]() SAP51 / SAP5S Datasheet © 2016 Integrated Device Technology, Inc. 41 January 28, 2016 5.11.2. Master/Repeater Mode In the Master/Repeater Mode, LED1 provides the Manchester-II-coded, re-synchronized equivalent of the tele- gram signal received at the AS-i input channel. Every AS-i telegram received is checked for consistency with the protocol specifications, and timing jitters are removed if they stay within the specified limits. If a telegram error is detected, the output becomes inactive for a certain time period; see section 5.19.3 for details. LED2 is always logic HIGH (high impedance) in Master/Repeater. In such applications, the green LED must be connected to the UOUT pin or different supply levels. 5.12. Oscillator Pins OSC1 and OSC2 Table 5.17 Oscillator Pin Parameters PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Input voltage range VOSC_IN -0.3 VU5R V External parasitic capacitor at oscillator pins OSC1, OSC2 COSC 0 8 pF Dedicated load capacity CLOAD 12 pF Input ”low” voltage for external clock applied to OSC1 VIL 0 1.5 V Input ”high” voltage for external clock applied to OSC1 VIH 3.5 VU5R V The oscillator supports direct connection of 5.33MHz or 16.000MHz crystals with a dedicated load capacity of 12pF and parasitic pin capacities of up to 8pF. The SAP5 automatically detects the oscillation frequency of the connected crystal and controls the internal clock generator circuit accordingly. The oscillator unit also contains a Clock Watchdog circuit that can generate an unconditioned SAP5 reset if there has been no clock oscillation for more than about 20µs. This is to prevent the SAP5 from unpredictable behavior if the clock signal is no longer available. 5.13. SAP5 Reset Any SAP5 reset sets the Data Output and Parameter Output Registers to FHEX and forces the corresponding output drivers to the high impedance state. Except on Power-On Reset, the Data Strobe (DSTBn) and Parameter Strobe (PSTBn) signals are simultaneously generated to indicate possibly changed output data to external circuitry. The Data_Exchange_Disable flag is set during an SAP5 reset, prohibiting any Data Port activity immediately after SAP5 initialization and as long as the external circuitry was not pre-conditioned by valid parameter output data. Consequently the AS-i master must send a Write_Parameter call in advance of the first Data_Exchange request to an initialized slave. The SAP5 initialization times are given in Table 5.18. |
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