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R5F564MLGDFP Scheda tecnica(PDF) 98 Page - Renesas Technology Corp

Il numero della parte R5F564MLGDFP
Spiegazioni elettronici  Renesas MCUs
PDF  162 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F564MLGDFP Scheda tecnica(HTML) 98 Page - Renesas Technology Corp

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R01DS0173EJ0120 Rev.1.20
Page 98 of 162
Oct 20, 2022
RX64M Group
2. Electrical Characteristics
2.3.6
EXDMAC Timing
Figure 2.30
EDREQ0 and EDREQ1 Input Timing
Figure 2.31
EDACK0 and EDACK1 Single-Address Transfer Timing (for a CS Area)
Table 2.24
EXDMAC Timing
Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0,
VCC_USBA = AVCC_USBA = 3.0 to 3.6 V,
VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V,
ICLK = PCLKA = 8 to 120 MHz, PCLKB = BCLK = SDCLK = 8 to 60 MHz, Ta = Topr
Output load conditions: VOH = VCC × 0.5, VOL = VCC × 0.5, C = 30 pF
High-drive output is selected by the driving ability control register.
Item
Symbol
Min.
Max.
Unit
Test
Conditions
EXDMAC
EDREQ setup time
tEDRQS
13
—
ns
Figure 2.30
EDREQ hold time
tEDRQH
2—
ns
EDACK delay time
tEDACD
—
13
ns
Figure 2.31,
Figure 2.32
BCLK pin
tEDRQS tEDRQH
EDREQ0,
EDREQ1
EDACK0,
EDACK1
tEDACD
BCLK pin
tEDACD



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