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XTP312 Scheda tecnica(PDF) 8 Page - Renesas Technology Corp

Il numero della parte XTP312
Spiegazioni elettronici  XT Family of Ultra-low Phase Noise Quartz-based PLL Oscillators
PDF  19 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

XTP312 Scheda tecnica(HTML) 8 Page - Renesas Technology Corp

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©2021 Renesas Electronics Corporation
R31DS0007EU0100 April 8, 2021
XT Datasheet
AC Electrical Characteristics
Note for all AC Electrical Characteristics tables:
1. Installation should include a 0.01μF bypass capacitor placed between VDD and GND to minimize power supply line noise.
Table 14. 3.3V AC Electrical Characteristics
VDD = 3.3V ± 5%, TA = -40°C to +85°C.
Symbol
Parameter
Test Condition
Minimum
Typical
Maximum Units
F
Output Frequency Range
LVDS, LVPECL, CML.
15
—
2100
MHz
HCSL.
15
—
725
Frequency Stability
Temperature = -40°C to +85°C.
—
—
±3
PPM
Frequency Tolerance (25°C)
TA = 25°C.
—
—
±2
Aging (1 year)
TA = 25°C.
—
—
±1
Aging (10 years)
TA = 25°C.
—
—
±7
Output Load
LVDS.
Differential.
—
100
—
Ω
LVPECL.
Thevenin equivalent.
—
50
—
HCSL.
To GND.
—
50
—
TST
Start-up Time
Output valid time after VDD meets minimum
specified level.
—
5
—
ms
tR
Output Rise Time
LVDS.
20% – 80%,
156.25MHz
—
299
400
ps
LVPECL.
—
287
400
HCSL.
—
306
400
CML
—
301
400
tF
Output Fall Time
LVDS.
80% – 20%,
156.25MHz
—
279
400
ps
LVPECL.
—
274
400
HCSL.
—
284
400
CML
—
279
400
ODC
Output Clock Duty Cycle
LVDS.
156.25MHz
45
—
55
%
LVPECL.
156.25MHz
45
—
55
HCSL.
156.25MHz
45
—
55
CML
156.25MHz
45
—
55
TOE
Output Enable/Disable Time
—
—
—
1
—
ms



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