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XTP312 Scheda tecnica(PDF) 14 Page - Renesas Technology Corp

Il numero della parte XTP312
Spiegazioni elettronici  XT Family of Ultra-low Phase Noise Quartz-based PLL Oscillators
PDF  19 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

XTP312 Scheda tecnica(HTML) 14 Page - Renesas Technology Corp

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©2021 Renesas Electronics Corporation
R31DS0007EU0100 April 8, 2021
XT Datasheet
LVDS Output Termination
For a general LVDS interface, the recommended value for the termination impedance (ZT) is between 90Ω and 132Ω. The actual value
should be selected to match the differential impedance (Z0) of your transmission line. A typical point-to-point LVDS design uses a 100Ω
parallel resistor at the receiver and a 100Ω differential transmission-line environment. In order to avoid any transmission-line reflection
issues, the components should be surface mounted and must be placed as close to the receiver as possible. Renesas offers a full line of
LVDS compliant devices with two types of output structures: current source and voltage source.
The standard termination schematic as shown in Figure 7 can be used with either type of output structure. Figure 8, which can also be
used with both output types, is an optional termination with center tap capacitance to help filter common mode noise. The capacitor value
should be approximately 50pF. If using a non-standard termination, it is recommended to contact Renesas and confirm if the output
structure is current source or voltage source type. In addition, since these outputs are LVDS compatible, the input receiver’s amplitude
and common-mode input range should be verified for compatibility with the output.
Figure 7. Standard LVDS Termination
Figure 8. Optional LVDS Termination



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