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ST92141 Scheda tecnica(PDF) 78 Page - STMicroelectronics |
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ST92141 Scheda tecnica(HTML) 78 Page - STMicroelectronics |
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78 / 179 page  78/179 ST92141 - RESET AND CLOCK CONTROL UNIT (RCCU) 5.8 LOW VOLTAGE DETECTOR (LVD) To allow the integration of power management features in the application, the Low Voltage Detec- tor function (LVD) generates a static reset when the VDD supply voltage is below a VLVDf reference value. This means that it secures the power-up as well as the power-down keeping the ST9 in reset. The VLVDf reference value for a voltage drop is lower than the VLVDr reference value for power-on in order to avoid a parasitic reset when the MCU starts running and sinks current on the supply (hysteresis). The LVD Reset circuitry generates a reset when VDD is below: –VLVDr when VDD is rising –VLVDf when VDD is falling The LVD function is illustrated in Figure 40. Provided the minimum VDD value (guaranteed for the oscillator frequency) is below VLVDf, the MCU can only be in two modes: – under full software control – in static safe reset In these conditions, secure operation is always en- sured for the application without the need for ex- ternal reset hardware. Figure 40. Low Voltage Detector vs Reset VDD VLVDr RESET VLVDf HYSTERISIS VLVDhyst 1 |
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