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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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STE100 Scheda tecnica(PDF) 61 Page - STMicroelectronics |
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STE100 Scheda tecnica(HTML) 61 Page - STMicroelectronics |
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61 / 66 page  61/66 STE10/100 Figure 17. PCI Timings Tsu Input Set up Time to Clock (bussed signals) 7ns Tsu(ptp) Input Set up Time to Clock (point to point) 10,12 ns Th Input Hold Time from Clock 0 ns Th Input Hold Time from Clock 0 ns Trst Reset Active Time after Power Stable 1ms Trst-clk Reset Active Time after CLK Stable 100 µs Trst-off Reset Active to Output Float delay 40 ns Table 21. PCI Timing Symbol Parameter Test Condition Min. Typ. Max. Units CLK 2.4V 0.4V Tval OUTPUT Delay Ton 1.5V 1.5V Tri-state OUTPUT INPUT 1.5V 1.5V Toff Tsu Th |
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