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ST72F321BAR6TCRE Scheda tecnica(PDF) 35 Page - STMicroelectronics

Il numero della parte ST72F321BAR6TCRE
Spiegazioni elettronici  8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface
PDF  247 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72F321BAR6TCRE Scheda tecnica(HTML) 35 Page - STMicroelectronics

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ST72321Bxxx-Auto
Register and memory map
35/247
Legend: x = undefined, R/W = read/write
0073h
0074h
0075h
0076h
0077h
0078h
0079h
007Ah
007Bh
007Ch
007Dh
PWM ART
PWMDCR3
PWMDCR2
PWMDCR1
PWMDCR0
PWMCR
ARTCSR
ARTCAR
ARTARR
ARTICCSR
ARTICR1
ARTICR2
PWM AR Timer Duty Cycle Register 3
PWM AR Timer Duty Cycle Register 2
PWM AR Timer Duty Cycle Register 1
PWM AR Timer Duty Cycle Register 0
PWM AR Timer Control Register
Auto-Reload Timer Control/Status Register
Auto-Reload Timer Counter Access Register
Auto-Reload Timer Auto-Reload Register
AR Timer Input Capture Control/Status Reg.
AR Timer Input Capture Register 1
AR Timer Input Capture Register 1
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read only
Read only
007Eh
007Fh
Reserved area (2 bytes)
1.
The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values of the
I/O pins are returned instead of the DR register contents.
2.
The bits associated with unavailable pins must always keep their reset value.
Table 3.
Hardware register map (continued)
Address
Block
Register label
Register name
Reset status
Remarks



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