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7480 Scheda tecnica(PDF) 37 Page - Renesas Technology Corp |
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7480 Scheda tecnica(HTML) 37 Page - Renesas Technology Corp |
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37 / 98 page ![]() MITSUBISHI MICROCOMPUTERS 7480/7481 GROUP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 36 PRELIMINAR Y Notice: This is not a final specification. Some parametric limits are subject to change. Fig. 37 Priority control at simplified SAEJ1850 BU S+ BU S- Unit A Unit B Unit A LAN data bus Unit B Continue to transmit Stop transmitting Data collision LAN data bus Application Example Priority Control at Simplified SAEJ1850 At simplified SAEJ1850 communication, when multiple units start to transmit data at the same time, priority control is exerted. On the LAN data bus, the “H” level has priority over the “L” level. When an “H” level collides with an “L” level, the LAN data bus sta- tus goes to the “H” level. For example, when unit A outputs “H” and unit B outputs “L” at the same time in Figure 37, the LAN data bus goes to “H”. Accord- ingly, unit A takes priority of control and continues its transmission, and unit B stops its transmission immediately. In this way, the 7480/7481 group exerts priority control for each bit and finally allows only the highest-priority unit to transmit data. |
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