M5M51008DFP datasheet(8/9 Pages) RENESAS

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MITSUBISHI LSIs

M5M51008DFP,VP,RV,KV,KR -55H, -70H

1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM

Ver. 1.1

VCC = 3V

1) S2

≤ 0.2V, other inputs = 0~3V

2) S1

≥ VCC–0.2V,S2 ≥ VCC–0.2V

other inputs = 0~3V

(Ta=0~70°C, unless otherwise noted)

0.2V

t rec (PD)

4.5V

≤ 0.2V

(3) POWER DOWN CHARACTERISTICS

S1 control mode

S2 control mode

POWER DOWN CHARACTERISTICS

(1) ELECTRICAL CHARACTERISTICS

Power down set up time

Power down recovery time

(2) TIMING REQUIREMENTS (Ta=0~70°C, unless otherwise noted )

tsu (PD)

trec (PD)

Symbol

Parameter

Max

Typ

Limits

Min

Test conditions

Unit

4.5V

t su (PD)

0.2V

2.2V

t su (PD)

4.5V

2.2V

t rec (PD)

≥ VCC – 0.2V

VCC

Symbol

Parameter

Max

Typ

Limits

Min

Test conditions

Unit

µA

0.2

VCC (PD)

VI (S1)

VI (S2)

ICC (PD)

Power down supply voltage

Chip select input S1

Chip select input S2

Power down supply current

2.2

~25°C

~40°C

~70°C

-H

0.8

Vcc(PD)

4.5V

≤Vcc(PD)

Vcc(PD)<4.5V

2.2V

≤Vcc(PD)

2.0

≤Vcc(PD)≤2.2V

Note 9: On the power down mode by controlling S1,the input level of S2 must be S2

≥ Vcc - 0.2V or

≤ 0.2V. The other pins(Address,I/O,WE,OE) can be in high impedance state.

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