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HD6432142 Scheda tecnica(PDF) 337 Page - Renesas Technology Corp |
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HD6432142 Scheda tecnica(HTML) 337 Page - Renesas Technology Corp |
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337 / 1177 page ![]() Section 10 14-Bit PWM Timer (PWMX) Rev. 4.00 Sep 27, 2006 page 293 of 1130 REJ09B0327-0400 10.1.3 Pin Configuration Table 10.1 lists the pins used by the PWM (D/A) module. Table 10.1 PWM Timer Input and Output Pins Name Abbr. I/O Function PWM output pin 0 PWX0 Output PWM output, channel A PWM output pin 1 PWX1 Output PWM output, channel B 10.1.4 Register Configuration Table 10.2 lists the registers of the PWM (D/A) module. Table 10.2 Register Configuration Name Abbreviation R/W Initial value Address* 1 PWM D/A control register DACR R/W H'30 H'FFA0* 2 PWM D/A data register A high DADRAH R/W H'FF H'FFA0* 2 PWM D/A data register A low DADRAL R/W H'FF H'FFA1* 2 PWM D/A data register B high DADRBH R/W H'FF H'FFA6* 2 PWM D/A data register B low DADRBL R/W H'FF H'FFA7* 2 PWM D/A counter high DACNTH R/W H'00 H'FFA6* 2 PWM D/A counter low DACNTL R/W H'03 H'FFA7* 2 Module stop control register MSTPCRH R/W H'3F H'FF86 MSTPCRL R/W H'FF H'FF87 Notes: 1. Lower 16 bits of the address. 2. Registers in the 14-bit PWM timer are assigned to the same addresses as the other registers. In this case, register selection is performed by the IICE bit in the serial timer control register (STCR), and also the same addresses are shared by DADRAH and DACR, and by DADRB and DACNT. Switching is performed by the REGS bit in DACNT or DADRB. |
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