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HD6432142 Scheda tecnica(PDF) 10 Page - Renesas Technology Corp |
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HD6432142 Scheda tecnica(HTML) 10 Page - Renesas Technology Corp |
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10 / 1177 page ![]() Rev. 4.00 Sep 27, 2006 page x of xliv Item Page Revision (See Manual for Details) 8.1 Overview Table 8.3 H8S/2144 Port Functions 220 Table 8.3 amended Expanded Modes Single-Chip Mode Port Description Pins Mode 1 Mode 2, Mode 3 (EXPE = 1) Mode 2, Mode 3 (EXPE = 0) Port A • 8-bit I/O port PA7 to PA0/ A23 to A16/ KIN15 to KIN8/ CIN15 to CIN8 I/O port also functioning as key-sense interrupt input ( KIN15 to KIN8), and expansion A/D converter input (CIN15 to CIN8) I/O port also functioning as address output (A23 to A16), key-sense interrupt input ( KIN15 to KIN8), and expansion A/D converter input (CIN15 to CIN8) I/O port also functioning as key-sense interrupt input ( KIN15 to KIN8) and expansion A/D converter input (CIN15 to CIN8) 8.7.2 Register Configuration Table 8.14 Port 6 Registers 247 Table 8.14 amended (Before) System control register → (After) System control register 2 8.9.3 Pin Functions Table 8.19 Port 8 Pin Functions 258 P81/GA20/CS2 selection method and pin function description amended Pin Selection Method and Pin Functions P81/GA20/ CS2 The pin function is switched as shown below according to the combination of operating mode, bit CS2E in SYSCR, bit FGA20E in HICR of the HIF, and bit P81DDR. Operating mode Not slave mode Slave mode FGA20E — 01 CS2E — 01 — P81DDR 0 1 0 1 — 01 Pin function P81 input pin P81 output pin P81 input pin P81 output pin CS2 input pin P81 input pin GA20 output pin This pin should be used as the GA20 output pin or CS2 input pin only in mode 2 or 3 (EXPE = 0). |
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