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HD6432142 Scheda tecnica(PDF) 379 Page - Renesas Technology Corp |
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HD6432142 Scheda tecnica(HTML) 379 Page - Renesas Technology Corp |
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379 / 1177 page ![]() Section 11 16-Bit Free-Running Timer Rev. 4.00 Sep 27, 2006 page 335 of 1130 REJ09B0327-0400 11.6 Usage Notes Application programmers should note that the following types of contention can occur in the free- running timer. Contention between FRC Write and Clear If an internal counter clear signal is generated during the state after an FRC write cycle, the clear signal takes priority and the write is not performed. Figure 11.18 shows this type of contention. T1 T2 FRC write cycle Address FRC address Internal write signal φ Counter clear signal FRC N H'0000 Figure 11.18 FRC Write-Clear Contention |
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