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HD6432142 Scheda tecnica(PDF) 482 Page - Renesas Technology Corp

Il numero della parte HD6432142
Spiegazioni elettronici  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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HD6432142 Scheda tecnica(HTML) 482 Page - Renesas Technology Corp

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Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 4.00 Sep 27, 2006 page 438 of 1130
REJ09B0327-0400
Bit 5—Overrun Error (ORER): Indicates that an overrun error occurred during reception,
causing abnormal termination.
Bit 5
ORER
Description
0
[Clearing condition]
(Initial value)*
1
When 0 is written in ORER after reading ORER = 1
1
[Setting condition]
When the next serial reception is completed while RDRF = 1*
2
Notes: 1. The ORER flag is not affected and retains its previous state when the RE bit in SCR is
cleared to 0.
2. The receive data prior to the overrun error is retained in RDR, and the data received
subsequently is lost. Also, subsequent serial reception cannot be continued while the
ORER flag is set to 1. In synchronous mode, serial transmission cannot be continued,
either.
Bit 4—Framing Error (FER): Indicates that a framing error occurred during reception in
asynchronous mode, causing abnormal termination.
Bit 4
FER
Description
0
[Clearing condition]
(Initial value)*
1
When 0 is written in FER after reading FER = 1
1
[Setting condition]
When the SCI checks the stop bit at the end of the receive data when reception ends,
and the stop bit is 0*
2
Notes: 1. The FER flag is not affected and retains its previous state when the RE bit in SCR is
cleared to 0.
2. In 2-stop-bit mode, only the first stop bit is checked for a value of 0; the second stop bit
is not checked. If a framing error occurs, the receive data is transferred to RDR but the
RDRF flag is not set. Also, subsequent serial reception cannot be continued while the
FER flag is set to 1. In synchronous mode, serial transmission cannot be continued,
either.



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