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HD6432142 Scheda tecnica(PDF) 675 Page - Renesas Technology Corp |
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HD6432142 Scheda tecnica(HTML) 675 Page - Renesas Technology Corp |
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675 / 1177 page ![]() Section 20 A/D Converter Rev. 4.00 Sep 27, 2006 page 631 of 1130 REJ09B0327-0400 Also, the bypass capacitors connected to AVCC, AVref and the filter capacitor connected to AN0 to AN7 must be connected to AVSS. If a filter capacitor is connected as shown in figure 20.7, the input currents at the analog input pins (AN0 to AN7) are averaged, and so an error may arise. Also, when A/D conversion is performed frequently, as in scan mode, if the current charged and discharged by the capacitance of the sample-and-hold circuit in the A/D converter exceeds the current input via the input impedance (R in), an error will arise in the analog input pin voltage. Careful consideration is therefore required when deciding the circuit constants. AVCC *1 AVref AN0 to AN7 AVSS Notes: Figures are reference values. 1. 2. Rin: Input impedance *1 Rin*2 100 Ω 0.1 µF 0.01 µF 10 µF Figure 20.7 Example of Analog Input Protection Circuit Table 20.5 Analog Pin Ratings Item Min Max Unit Analog input capacitance — 20 pF Permissible signal source impedance — 10* k Ω Note: * When V CC = 4.0 to 5.5 V and φ ≤ 12 MHz. |
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