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HD6432142 Scheda tecnica(PDF) 127 Page - Renesas Technology Corp |
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HD6432142 Scheda tecnica(HTML) 127 Page - Renesas Technology Corp |
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127 / 1177 page ![]() Section 3 MCU Operating Modes Rev. 4.00 Sep 27, 2006 page 83 of 1130 REJ09B0327-0400 Section 3 MCU Operating Modes 3.1 Overview 3.1.1 Operating Mode Selection This LSI has three operating modes (modes 1 to 3). These modes enable selection of the CPU operating mode and enabling/disabling of on-chip ROM, by setting the mode pins (MD1 and MD0). Table 3.1 lists the MCU operating modes. Table 3.1 MCU Operating Mode Selection MCU Operating Mode MD1 MD0 CPU Operating Mode Description On-Chip ROM 00 0 — — — 1 1 Normal Expanded mode with on-chip ROM disabled Disabled 2 1 0 Advanced Expanded mode with on-chip ROM enabled Single-chip mode Enabled 3 1 Normal Expanded mode with on-chip ROM enabled Single-chip mode The CPU’s architecture allows for 4 Gbytes of address space, but this LSI actually access a maximum of 16 Mbytes. Mode 1 is an externally expanded mode that allows access to external memory and peripheral devices. With modes 2 and 3, operation begins in single-chip mode after reset release, but a transition can be made to external expansion mode by setting the EXPE bit in MDCR. This LSI can only be used in modes 1 to 3. These means that the mode pins must select one of these modes. Do not changes the inputs at the mode pins during operation. |
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