HD6432142 datasheet(200/1177 Pages) RENESAS

200 / 1177 page

Section 6 Bus Controller

Rev. 4.00 Sep 27, 2006 page 156 of 1130

REJ09B0327-0400

Bit 7—RAM Select (RAMS)/Bit 6—RAM Area Setting (RAM0): Reserved bits. Always write

0 when writing to these bits in the A-mask version.

Bit 5—Bus Width Control (ABW): Specifies whether the external memory space is 8-bit access

space or 16-bit access space.

Bit 5

ABW

Description

External memory space is designated as 16-bit access space

External memory space is designated as 8-bit access space

(Initial value)

Bit 4—Access State Control (AST): Specifies whether the external memory space is 2-state

access space or 3-state access space, and simultaneously enables or disables wait state insertion.

Bit 4

AST

Description

External memory space is designated as 2-state access space

Wait state insertion in external memory space accesses is disabled

External memory space is designated as 3-state access space

(Initial value)

Wait state insertion in external memory space accesses is enabled

Bits 3 and 2—Wait Mode Select 1 and 0 (WMS1, WMS0): These bits select the wait mode

when external memory space is accessed while the AST bit is set to 1.

Bit 3

Bit 2

WMS1

WMS0

Description

Program wait mode

(Initial value)

Wait-disabled mode

Pin wait mode

Pin auto-wait mode

HD6432142 Scheda tecnica(PDF) 200 Page - Renesas Technology Corp