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SH7052 Scheda tecnica(PDF) 191 Page - Renesas Technology Corp |
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SH7052 Scheda tecnica(HTML) 191 Page - Renesas Technology Corp |
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191 / 919 page  165 9.3.8 Bus Mode and Channel Priorities If, for example, a transfer request is issued for channel 0 while transfer is in progress on lower- priority channel 1 in burst mode, transfer is started immediately on channel 0. In this case, if channel 0 is set to burst mode, channel 1 transfer is continued after completion of all transfers on channel 0. If channel 0 is set to cycle-steal mode, channel 1 transfer is continued only if a channel 0 transfer request has not been issued; if a transfer request is issued, channel 0 transfer is started immediately. 9.3.9 Source Address Reload Function Channel 2 has a source address reload function. This returns to the first value set in the source address register (SAR2) every four transfers by setting the RO bit of CHCR2 to 1. Figure 9.10 illustrates this operation. Figure 9.11 is a timing chart for reload ON mode, with burst mode, auto- request, 16-bit transfer data size, SAR2 increment, and DAR2 fixed. SAR2 (initial value) DMAC Transfer request DMAC control block Reload control 4th count CHCR2 DMATCR2 SAR2 RO bit = 1 Count signal Reload signal Reload signal Figure 9.10 Source Address Reload Function |
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