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TDA7503 Scheda tecnica(PDF) 13 Page - STMicroelectronics |
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TDA7503 Scheda tecnica(HTML) 13 Page - STMicroelectronics |
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13 / 26 page ![]() SPI INTERFACE Symbol Description Min Value Unit MASTER tsclk Clock Cycle mclk/12 µs tdtr Sclk edge to MOSI valid 40 µs tdts MISO setup time 5 µs SLAVE tsclk Clock Cycle mclk/6 µs tdtr Sclk edge to MOSI valid 40 µs tdts MISO setup time 5 µs tsckph Minimum SCK high time mclk/12 µs tsckpl Minimum SCK low time mclk/12 µs SCLK (CPOL=0, CPHA=0) SCLK SCLK SCLK MISO/ MOSI SS (CPOL=0, CPHA=1) (CPOL=1, CPHA=0) (CPOL=1, CPHA=1) Internal Strobe for Data Capture MSB 6 5 4 3 2 1 LSB Figure 8. SPI Clocking scheme. TDA7503 13/26 |
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