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TDA7503 Scheda tecnica(PDF) 5 Page - STMicroelectronics

Il numero della parte TDA7503
Spiegazioni elettronici  DUAL DSP PLUS MICRO FOR AUDIO APPLICATIONS
PDF  26 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TDA7503 Scheda tecnica(HTML) 5 Page - STMicroelectronics

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N.
Name
Type
Reset
Status (1)
Function
75
RA10(P2.2)
I/O
I
Microcontroller High Byte Address Lines. This pin is the address line 10
of a 16 bit address, for external EPROM and memory mapped devices. It
can also act as GPIO using the P2 and P2DIR registers.
69
RA11(P2.3)
I/O
I
Microcontroller High Byte Address Lines. This pin is the address line 11
of a 16 bit address, for external EPROM and memory mapped devices. It
can also act as GPIO using the P2 and P2DIR registers.
63
RA12(P2.4)
I/O
I
Microcontroller High Byte Address Lines. This pin is the address line 12
of a 16 bit address, for external EPROM and memory mapped devices. It
can also act as GPIO using the P2 and P2DIR registers.
66
RA13(P2.5)
I/O
I
Microcontroller High Byte Address Lines. This pin is the address line 13
of a 16 bit address, for external EPROM and memory mapped devices. It
can also act as GPIO using the P2 and P2DIR registers.
65
RA14(P2.6)
I/O
I
Microcontroller High Byte Address Lines. This pin is the address line 14
of a 16 bit address, for external EPROM and memory mapped devices. It
can also act as GPIO using the P2 and P2DIR registers.
64
RA15(P2.7)
I/O
I
Microcontroller High Byte Address Lines. This pin is the address line 15
of a 16 bit address, for external EPROM and memory mapped devices. It
can also act as GPIO using the P2 and P2DIR registers.
83
RAD0(P0.0)
I/O
I
Microcontroller Address/Data Pins. This pin is the multiplexed address
and data line bit 0 for external EPROM and memory mapped peripherals.
It can also act as GPIO using the P0 and P0DIR registers.
82
RAD1(P0.1)
I/O
I
Microcontroller Address/Data Pins. This pin is the multiplexed address
and data line bit 1 for external EPROM and memory mapped peripherals.
It can also act as GPIO using the P0 and P0DIR registers.
81
RAD2(P0.2)
I/O
I
Microcontroller Address/Data Pins. This pin is the multiplexed address
and data line bit 2 for external EPROM and memory mapped peripherals.
It can also act as GPIO using the P0 and P0DIR registers.
80
RAD3(P0.3)
I/O
I
Microcontroller Address/Data Pins. This pin is the multiplexed address
and data line bit 3 for external EPROM and memory mapped peripherals.
It can also act as GPIO using the P0 and P0DIR registers.
79
RAD4(P0.4)
I/O
I
Microcontroller Address/Data Pins. This pin is the multiplexed address
and data line bit 4 for external EPROM and memory mapped peripherals.
It can also act as GPIO using the P0 and P0DIR registers.
78
RAD5(P0.5)
I/O
I
Microcontroller Address/Data Pins. This pin is the multiplexed address
and data line bit 5 for external EPROM and memory mapped peripherals.
It can also act as GPIO using the P0 and P0DIR registers.
77
RAD6(P0.6)
I/O
I
Microcontroller Address/Data Pins. This pin is the multiplexed address
and data line bit 6 for external EPROM and memory mapped peripherals.
It can also act as GPIO using the P0 and P0DIR registers.
76
RAD7(P0.7)
I/O
I
Microcontroller Address/Data Pins. This pin is the multiplexed address
and data line bit 7 for external EPROM and memory mapped peripherals.
It can also act as GPIO using the P0 and P0DIR registers.
84
xALE
I/O
I
Microcontroller External Address Latch Enable. This pin is the address
latch enable. A logic high indicates that address/data lines 7 through 0
represent an address. Inactive for Program/Data fetches from internal
AUX.
85
WR(P3.6)
I/O
I
Microcontroller Write Strobe. External data memory write strobe. This pin
can also act as GPIO using the P3 and P3DIR registers.
86
RD(P3.7)
I/O
I
Microcontroller Read Strobe. External data memory read strobe. Active
Low, or GPIO. This pin can also act as GPIO using the P3 and P3DIR
registers. Disabled by setting the RDSEL bit in the PINCTL register.
70
XPSEN
I/O
I
Microcontroller External Program Memory Enable. External program
memory enable pin. Active Low. Changes functionality to RD when
Microcontroller is fetching instructions out of internal AUX ram.
Controlled by the PSSEL and PSBIT bits in the PINCTL register.
PIN DESCRIPTION (continued)
TDA7503
5/26



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