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AT80C51RA2-RLSIV Scheda tecnica(PDF) 45 Page - ATMEL Corporation |
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AT80C51RA2-RLSIV Scheda tecnica(HTML) 45 Page - ATMEL Corporation |
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45 / 86 page ![]() 45 4188F–8051–01/08 AT/TS8xC51Rx2 Figure 6-14. Power-Down Exit Waveform Exit from power-down by reset redefines all the SFRs, exit from power-down by external inter- rupt does no affect the SFRs. Exit from power-down by either reset or external interrupt does not affect the internal RAM content. Note: If idle mode is activated with power-down mode (IDL and PD bits set), the exit sequence is unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and idle mode is not entered. Table 6-20. The state of ports during idle and power-down mode * Port 0 can force a "zero" level. A "one" will leave port floating. INT1 INT0 XTAL1 Power-down phase Oscillator restart phase Active phase Active phase Mode Program Memory ALE PSEN PORT0 PORT1 PORT2 PORT3 Idle Internal 1 1 Port Data* Port Data Port Data Port Data Idle External 1 1 Floating Port Data Address Port Data Power-down Internal 0 0 Port Data* Port Data Port Data Port Data Power-down External 0 0 Floating Port Data Port Data Port Data |
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