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TMC2192 Scheda tecnica(PDF) 32 Page - Cadeka Microcircuits LLC. |
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TMC2192 Scheda tecnica(HTML) 32 Page - Cadeka Microcircuits LLC. |
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32 / 69 page ![]() TMC2192 PRODUCT SPECIFICATION 32 REV. 1.0.0 8/13/03 sequence simply do not acknowledge (NOACK) the last byte received and the TMC2192 will terminate the sequence. A repeated start signal occurs when the master device driv- ing the serial interface generates a start signal without first generating a stop signal to terminate the current communica- tion. This is used to change the mode of communication (read, write) between the slave and master without releasing the serial interface lines. Figure 26. Serial Interface – Typical Byte Transfer Figure 27. Serial Interface – Chip Address Serial Interface Read/Write Examples Write to one control register • Start signal • Slave Address byte (R/W bit = LOW) • Block Pointer (00) • Offset Pointer • Data byte to base address • Stop signal Write to four consecutive control registers • Start signal • Slave Address byte (R/W bit = LOW) • Block Pointer (00) • Offset Pointer • Data byte to base address • Data byte to (base address + 1) • Data byte to (base address + 2) • Data byte to (base address + 3) • Stop signal Write to one OLUT location • Start signal • Slave Address byte (R/W bit = LOW) • Block Pointer (01) • Offset Pointer (base address) • Data byte to base address (Y) • Data byte to base address (Cb) • Data byte to base address (Cr) • Stop signal Write to four consecutive OLUT locations • Start signal • Slave Address byte (R/W bit = LOW) • Block Pointer (01) • Offset Pointer (base address) • Data byte to base address (Y) • Data byte to base address (Cb) • Data byte to base address (Cr) • Data byte to base address +1 (Y) • Data byte to base address +1 (Cb) • Data byte to base address +1 (Cr) • Data byte to base address +2 (Y) • Data byte to base address +2 (Cb) • Data byte to base address +2 (Cr) • Data byte to base address +3 (Y) • Data byte to base address +3 (Cb) • Data byte to base address +3 (Cr) • Stop signal Read from one control register • Start signal • Slave Address byte (R/W bit = LOW) • Block Pointer (00) • Offset Pointer • Stop signal • Start signal • Slave Address byte (R/W bit = HIGH) • Data byte from base address •NOACK SDA 65-6294-29 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ACK SCL SDA 65-6294-30 A6 A5 A4 A3 A2 SA1 SA0 R/W ACK SCL |
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