CM6800AGIP datasheet(13/18 Pages) CHAMP

13 / 18 page

CM6800A

LOW START-UP CURRENT PFC/PWM CONTROLLER COMBO

2009/08/10 Rev. 1.6

Champion Microelectronic Corporation

Page 13

where CSS is the required soft start capacitance, and the

tDEALY is the desired start-up delay.

It is important that the time constant of the PWM soft-start

allow the PFC time to generate sufficient output power for

the PWM section. The PWM start-up delay should be at

least 5ms.

Solving for the minimum value of CSS:

CSS = 5ms x

0.7V

= 142nF

Caution should be exercised when using this minimum soft

start capacitance value because premature charging of the

SS capacitor and activation of the PWM section can result if

VFB is in the hysteresis band of the VIN OK comparator at

start-up. The magnitude of VFB at start-up is related both to

line voltage and nominal PFC output voltage. Typically, a

1.0

μ F soft start capacitor will allow time for V

FB and PFC

out to reach their nominal values prior to activation of the

PWM section at line voltages between 90Vrms and

265Vrms.

In today’s PC power supply, since it has the house-keeping

IC in the secondary, the time sequence maybe different

from the last paragraph. The 5mS delay and the 1uF Soft

Start Capacitor may vary and they may vary base on the

application conditions.

Generating VCC

After turning on CM6800A at 13V, the operating voltage

can vary from 10V to 17.9V. The threshold voltage of VCC

OVP comparator is 17.9V. The hysteresis of VCC OVP is

1.5V. When VCC see 17.9V, PFCOUT will be low, and

PWM section will not be disturbed. That’s the two ways to

generate VCC. One way is to use auxiliary power supply

around 15V, and the other way is to use bootstrap winding

to self-bias CM6800A system. The bootstrap winding can

be either taped from PFC boost choke or from the

transformer of the DC to DC stage.

The ratio of winding transformer for the bootstrap should be

set between 18V and 15V. A filter network is recommended

between VCC (pin 13) and bootstrap winding. The resistor of

the filter can be set as following.

RFILTER x IVCC ~ 2V, IVCC = IOP + (QPFCFET + QPWMFET ) x fsw

IOP = 3mA (typ.)

If anything goes wrong, and VCC goes beyond 17.9V, the

PFC gate (pin 12) drive goes low and the PWM gate drive

(pin 11) remains function. The resistor’s value must be

chosen to meet the operating current requirement of the

CM6800A itself (5mA, max.) plus the current required by the

two gate driver outputs.

EXAMPLE:

With a wanting voltage called, VBIAS ,of 18V, a VCC of 15V

and the CM6800A driving a total gate charge of 90nC at

100kHz (e.g. 1 IRF840 MOSFET and 2 IRF820 MOSFET),

the gate driver current required is:

IGATEDRIVE = 100kHz x 90nC = 9mA

RBIAS =

BIAS

−

RBIAS =

9mA

5mA

15V

18V

−

Choose RBIAS = 214Ω

The CM6800A should be locally bypassed with a 1.0

μ F

ceramic capacitor. In most applications, an electrolytic

capacitor of between 47

μ F and 220 μ F is also required

across the part, both for filtering and as part of the start-up

bootstrap circuitry.

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