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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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AT89LP428 Scheda tecnica(PDF) 28 Page - ATMEL Corporation |
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AT89LP428 Scheda tecnica(HTML) 28 Page - ATMEL Corporation |
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28 / 149 page  28 3654A–MICRO–8/09 AT89LP428/828 Figure 8-2. Interrupt Recovery from Power-down (PWDEX = 1) 8.2.2 Reset Recovery from Power-down The wake-up from Power-down through an external reset is similar to the interrupt with PWDEX = “0”. At the falling edge of RST, Power-down is exited, the oscillator is restarted, and an internal timer begins counting as shown in Figure 8-3. The internal clock will not be allowed to propagate to the CPU until after the timer has timed out. The time-out period is controlled by the Start-up Timer Fuses. (See Table 7-1 on page 25). If RST returns high before the time-out, a two clock cycle internal reset is generated when the internal clock restarts. Otherwise, the device will remain in reset until RST is brought high. Figure 8-3. Reset Recovery from Power-down . PWD INT1 XTAL1 Internal Clock PWD RST XTAL1 tSUT Internal Clock Internal Reset |
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