L99PD08 datasheet(27/41 Pages) STMICROELECTRONICS

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L99PD08

SPI

Doc ID 15872 Rev 3

27/41

Figure 10.

SDO status

Note:

In case of a status change during an SPI transmission this status will not be read and

therefore not cleared in case of a clear command.

Due to the internal mechanism of loading the status data into the shift register a possible

inconsistency between the GlobalErrorRegister and the read StatusRegister can occur. In

this case, the data in the Status Register is always the more actual data.

No (chip reset or

communication error)

Active low

Activated by all internal reset events which

change the device state or configuration

registers (e.g. software reset, VCORE3

undervoltage, etc.). This bit is initially '0' and will

be set to '1' by a valid SPI communication to any

Over temp/ over load

Active high

Set when over temp and/or over load failure is

detected by the diagnosis function

n/a

Not implemented

Open-load

Active high

Set when open-load failure is detected by the

diagnosis function

STK_ON

Active high

Set when SHORT TO BATTERY is detected by

the diagnosis function (OFF state diagnosis)

Fail save

Active high

Indicates if the device is in FAIL SAVE (defined

state)

Table 22.

Global status byte: description (continued)

Name

Polarity

Comment

CSN

SCK

SDI

SDO

CSN high to low and SCK stays low: status information of data bit 0 (fault condition) is transfered to SDO

time

SDI: data is not accepted

SDO: status information of data bit 0 (Global Error Flag) will stay as long CSN is low

GEF

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