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SC68C652B Scheda tecnica(PDF) 32 Page - NXP Semiconductors |
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SC68C652B Scheda tecnica(HTML) 32 Page - NXP Semiconductors |
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32 / 43 page ![]() SC68C652B_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 2 November 2009 32 of 43 NXP Semiconductors SC68C652B Dual UART with 32-byte FIFOs and IrDA encoder/decoder (1) CS timing during a write cycle. See Figure 6. (2) CS timing during a read cycle. See Figure 5. Fig 7. Modem input/output timing td7 change of state td8 td8 td9 002aab089 td8 change of state change of state change of state active active active active active active active change of state RTSA, RTSB DTRA, DTRB CS (write)(1) CDA, CDB CTSA, CTSB DSRA, DSRB IRQ CS (read)(2) RIA, RIB Fig 8. External clock timing external clock 002aac357 tw(clk) tWL tWH f XTAL 1 t wclk () --------------- = |
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