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EM351-RTR Scheda tecnica(PDF) 119 Page - List of Unclassifed Manufacturers

Il numero della parte EM351-RTR
Spiegazioni elettronici  High-Performance, Integrated ZigBee/802.15.4 System-on-Chip
PDF  240 Pages
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Produttore elettronici  ETC2 [List of Unclassifed Manufacturers]
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EM351-RTR Scheda tecnica(HTML) 119 Page - List of Unclassifed Manufacturers

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EM351 / EM357
SCx_RXERRA
SC1_RXERRA
DMA First Receive Error Register A
Address: 0x4000C834 Reset: 0x0
SC2_RXERRA
DMA First Receive Error Register A
Address: 0x4000C034 Reset: 0x0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
0
0
SC_RXERRA
7
6
5
4
3
2
1
0
SC_RXERRA
Bitname
Bitfield
Access
Description
SC_RXERRA
[13:0]
R
The offset from the start of DMA receive buffer A of the first byte received with a parity,
frame, or overflow error. Note that an overflow error occurs at the input to the receive
FIFO, so this offset is 4 bytes before the overflow position. If there is no error, it reads
zero. This register will not be updated by subsequent errors until the buffer unloads and
is reloaded, or the receive DMA is reset.
8-48
120-035X-000D
Preliminary



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