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EM351-RTR Scheda tecnica(PDF) 120 Page - List of Unclassifed Manufacturers |
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EM351-RTR Scheda tecnica(HTML) 120 Page - List of Unclassifed Manufacturers |
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120 / 240 page ![]() EM351 / EM357 8-49 120-035X-000D Preliminary SCx_RXERRB SC1_RXERRB DMA First Receive Error Register B Address: 0x4000C838 Reset: 0x0 SC2_RXERRB DMA First Receive Error Register B Address: 0x4000C038 Reset: 0x0 31 30 29 28 27 26 25 24 0 0 0 0 0 0 0 0 23 22 21 20 19 18 17 16 0 0 0 0 0 0 0 0 15 14 13 12 11 10 9 8 0 0 SC_RXERRB 7 6 5 4 3 2 1 0 SC_RXERRB Bitname Bitfield Access Description SC_RXERRB [13:0] R The offset from the start of DMA receive buffer B of the first byte received with a parity, frame, or overflow error. Note that an overflow error occurs at the input to the receive FIFO, so this offset is 4 bytes before the overflow position. If there is no error, it reads zero. This register will not be updated by subsequent errors until the buffer unloads and is reloaded, or the receive DMA is reset. |
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