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MB90F337 Scheda tecnica(PDF) 17 Page - fujitsu semiconductor |
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MB90F337 Scheda tecnica(HTML) 17 Page - fujitsu semiconductor |
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17 / 48 page ![]() MB90335 Series DS07-13735-6E 17 (Continued) Address Register abbreviation Register Read/ Write Resource name Initial Value 000066H to 00006EH Prohibited 00006FH ROMM ROM Mirroring Function Selection Register W ROM Mirror Function Selection Module - - - - - - 1 1B 000070H IBSR0 I2C Bus Status Register R I2C Bus Interface 0 0 0 0 0 0 0 0B 000071H IBCR0 I2C Bus Control Register R/W 0 0 0 0 0 0 0 0B 000072H ICCR0 I2C Bus Clock Control Register R/W XX 0 XXXXXB 000073H IADR0 I2C Bus Address Register R/W XXXXXXXXB 000074H IDAR0 I2C Bus Data Register R/W XXXXXXXXB 000075H to 00009AH Prohibited 00009BH DCSR DMA Descriptor Channel Specification Register R/W μDMAC 0 0 0 0 0 0 0 0B 00009CH DSRL DMA Status Register Lower R/W 0 0 0 0 0 0 0 0B 00009DH DSRH DMA Status Register Upper R/W 0 0 0 0 0 0 0 0B 00009EH PACSR Program Address Detection Control Status Register R/W Address Match Detection 0 0 0 0 0 0 0 0B 00009FH DIRR Delayed Interrupt Source generate/ release Register R/W Delayed Interrupt - - - - - - - 0B 0000A0H LPMCR Low Power Consumption Mode Control Register R/W Low Power Consumption control circuit 0 0 0 1 1 0 0 0B 0000A1H CKSCR Clock Selection Register R/W Clock 1 1 1 1 1 1 0 0B 0000A2H Prohibited 0000A3H 0000A4H DSSR DMA Stop Status Register R/W μDMAC 0 0 0 0 0 0 0 0B 0000A5H to 0000A7H Prohibited 0000A8H WDTC Watchdog Timer Control Register R/W Watchdog Timer X - XXX 1 1 1B 0000A9H TBTC Time-base Timer Control Register R/W Time-base Timer 1 - - 0 0 1 0 0B 0000AAH Prohibited 0000ABH 0000ACH DERL DMA Enable Register Lower R/W μDMAC 0 0 0 0 0 0 0 0B 0000ADH DERH DMA Enable Register Upper R/W 0 0 0 0 0 0 0 0B 0000AEH FMCS Flash Memory Control Status Register R/W Flash Memory I/F 0 0 0 X 0 0 0 0B 0000AFH Prohibited |
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