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E2000 Scheda tecnica(PDF) 87 Page - Intel Corporation |
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E2000 Scheda tecnica(HTML) 87 Page - Intel Corporation |
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87 / 104 page  Datasheet 87 Features 6 Features 6.1 Power-On Configuration Options Several configuration options can be configured by hardware. The processor samples the hardware configuration at reset, on the active-to-inactive transition of RESET#. For specifications on these options, refer to Table 33. The sampled information configures the processor for subsequent operation. These configuration options cannot be changed except by another reset. All resets reconfigure the processor; for reset purposes, the processor does not distinguish between a "warm" reset and a "power-on" reset. Table 33. Power-On Configuration Option Signals Configuration Option Signal1,2,3 NOTES: 1. Asserting this signal during RESET# will select the corresponding option. 2. Address signals not identified in this table as configuration options should not be asserted during RESET#. 3. Disabling of any of the cores within the processor must be handled by configuring the EXT_CONFIG Model Specific Register (MSR). This MSR will allow for the disabling of a single core. Output tristate SMI# Execute BIST A3# Disable dynamic bus parking A25# Symmetric agent arbitration ID BR0# RESERVED A[8:5]#, A[24:11]#, A[35:26]# |
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