AT89LP51 datasheet(13/113 Pages) ATMEL

13 / 113 page

3709B–MICRO–12/10

AT89LP51/52 - Preliminary

Figure 3-5.

Internal Data Memory Map

3.2.1

DATA

The first 128 bytes of RAM are directly addressable by an 8-bit address (00H–7FH) included in

the instruction. The lowest 32 bytes of DATA memory are grouped into 4 banks of 8 registers

each. The RS0 and RS1 bits (PSW.3 and PSW.4) select which register bank is in use. Instruc-

tions using register addressing will only access the currently specified bank. The lower 128 bit

addresses are also mapped into DATA addresses 20H—2FH.

3.2.2

IDATA

The full 256 byte internal RAM can be indirectly addressed using the 8-bit pointers R0 and R1.

The first 128 bytes of IDATA include the DATA space. The hardware stack is also located in the

IDATA space.

3.2.3

SFR

The upper 128 direct addresses (80H–FFH) access the I/O registers. I/O registers on AT89LP

devices are referred to as Special Function Registers. The SFRs can only be accessed through

direct addressing. All SFR locations are not implemented. See Section 4. for a listed of available

SFRs.

3.3

External Data Memory

AT89LP microcontrollers support a 16-bit external memory address space for up to 64K bytes of

external data memory (XDATA). The external memory space is accessed with the MOVX

instructions. Some internal data memory resources are mapped into portions of the external

address space as shown in Figure 3-6. These memory spaces may require configuration before

the CPU can access them. The AT89LP51/52 includes 256 bytes of nonvolatile Flash data

memory (FDATA).

3.3.1

XDATA

The external data memory space can accommodate up to 64KB of external memory. The

AT89LP51/52 uses the standard 8051 external data memory interface with the upper address

byte on Port 2, the lower address byte and data in/out multiplexed on Port 0, and the ALE, RD

and WR strobes. XDATA can be accessed with both 16-bit (MOVX @DPTR) and 8-bit (MOVX

@Ri) addresses. See Section 3.3.3 on page 17 for more details of the external memory

interface.

FFH

UPPER

128

80H

7FH

LOWER

128

ACCESSIBLE

BY DIRECT

ADDRESSING

FFH

80H

ACCESSIBLE

BY DIRECT

AND INDIRECT

ADDRESSING

SPECIAL

FUNCTION

REGISTERS

PORTS

STATUS AND

CONTROL BITS

REGISTERS

STACK POINTER

ACCUMULATOR

(ETC.)

TIMERS

ACCESSIBLE

BY INDIRECT

ADDRESSING

ONLY

IDATA

SFR

DATA/IDATA

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