AT89LP51 datasheet(39/113 Pages) ATMEL

39 / 113 page

3709B–MICRO–12/10

AT89LP51/52 - Preliminary

Table 9-2.

IE – Interrupt Enable Register

IE = A8H

Reset Value = 0000 0000B

Bit Addressable

–

ET2

ET1

EX1

ET0

EX0

Bit

543

Symbol

Function

Global enable/disable. All interrupts are disabled when EA = 0. When EA = 1, each interrupt source is enabled/disabled by setting

/clearing its own enable bit.

ET2

Timer 2 Interrupt Enable

ESSerial Port Interrupt Enable

ET1

Timer 1 Interrupt Enable

EX1

External Interrupt 1 Enable

ET0

Timer 0 Interrupt Enable

EX0

External Interrupt 0 Enable

Table 9-3.

IP – Interrupt Priority Register

IP = B8H

Reset Value = 0000 0000B

Bit Addressable

––

PT2

PT1

PX1

PT0

PX0

Bit

543

Symbol

Function

PT2

Timer 2 Interrupt Priority Low

PSSerial Port Interrupt Priority Low

PT1

Timer 1 Interrupt Priority Low

PX1

External Interrupt 1 Priority Low

PT0

Timer 0 Interrupt Priority Low

PX0

External Interrupt 0 Priority Low

Table 9-4.

IPH – Interrupt Priority High Register

IPH = B7H

Reset Value = 0000 0000B

Not Bit Addressable

––

PT2H

PSH

PT1H

PX1H

PT0H

PX0H

Bit

543

Symbol

Function

PT2H

Timer 2 Interrupt Priority High

PSH

Serial Port Interrupt Priority High

PT1H

Timer 1 Interrupt Priority High

PX1H

External Interrupt 1 Priority High

PT0H

Timer 0 Interrupt Priority High

PX0H

External Interrupt 0 Priority High

AT89LP51 Scheda tecnica(PDF) 39 Page - ATMEL Corporation

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