M48Z08 datasheet(8/20 Pages) STMICROELECTRONICS

8 / 20 page

Operation modes

M48Z08, M48Z18

8/20

Doc ID 2424 Rev 7

Figure 4.

READ mode AC waveforms

Note:

WRITE enable (W) = high.

Table 3.

READ mode AC characteristics

2.2

WRITE mode

The M48Z08/18 is in the WRITE mode whenever W and E are active. The start of a WRITE

is referenced from the latter occurring falling edge of W or E.

A WRITE is terminated by the earlier rising edge of W or E. The addresses must be held

valid throughout the cycle. E or W must return high for a minimum of tEHAX from chip enable

or tWHAX from WRITE Enable prior to the initiation of another READ or WRITE cycle. Data-

in must be valid tDVWH prior to the end of WRITE and remain valid for tWHDX afterward. G

should be kept high during WRITE cycles to avoid bus contention; although, if the output bus

has been activated by a low on E and G, a low on W will disable the outputs tWLQZ after W

falls.

Symbol

Parameter(1)

Valid for ambient operating temperature: TA = 0 to 70 °C; VCC = 4.75 to 5.5 V or 4.5 to 5.5 V (except where noted).

M48Z08/M48Z18

Unit

Min

Max

tAVAV

READ cycle time

100

tAVQV

Address valid to output valid

100

tELQV

Chip enable low to output valid

100

tGLQV

Output enable low to output valid

tELQX

(2)

CL = 30 pF.

Chip enable low to output transition

tGLQX

(2)

Output enable low to output transition

tEHQZ

(2)

Chip enable high to output Hi-Z

tGHQZ

(2)

Output enable high to output Hi-Z

tAXQX

Address transition to output transition

AI01385

tAVAV

tAVQV

tAXQX

tELQV

tELQX

tEHQZ

tGLQV

tGLQX

tGHQZ

VALID

A0-A12

DQ0-DQ7

VALID

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