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M48Z08 Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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M48Z08 Scheda tecnica(HTML) 1 Page - STMicroelectronics |
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1 / 20 page ![]() May 2010 Doc ID 2424 Rev 7 1/20 1 M48Z08 M48Z18 5 V, 64 Kbit (8 Kb x 8) ZEROPOWER® SRAM Features ■ Integrated, ultra low power SRAM and power- fail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages (VPFD = power-fail deselect voltage): –M48Z08: VCC = 4.75 to 5.5 V 4.5 V ≤ VPFD ≤ 4.75 V –M48Z18: VCC = 4.5 to 5.5 V 4.2 V ≤ VPFD ≤ 4.5 V ■ Self-contained battery in the CAPHAT™ DIP package ■ Pin and function compatible with JEDEC standard 8 K x 8 SRAMs ■ RoHS compliant – Lead-free second level interconnect 28 1 PCDIP28 (PC) Battery CAPHAT™ www.st.com |
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