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R5F363AMNFB Scheda tecnica(PDF) 52 Page - Renesas Technology Corp |
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R5F363AMNFB Scheda tecnica(HTML) 52 Page - Renesas Technology Corp |
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52 / 119 page ![]() R01DS0033EJ0200 Rev.2.00 Page 52 of 115 Feb 07, 2011 M16C/63 Group 5. Electrical Characteristics Notes: 1. The average output current is the mean value within 100 ms. 2. Calculated by the following equation according to VCC1: See Figure 5.1 “Relation between f(BCLK) and VCC1” Table 5.4 Recommended Operating Conditions (3/4) VCC1 = VCC2 = 1.8 to 5.5 V at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified. Symbol Parameter Standard Unit Min. Typ. Max. IOL(sum) Low peak output current (100-pin package) VCC1, VCC2 ≥ 2.7 V Sum of IOL(peak) at P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7 80.0 mA Sum of IOL(peak) at P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_5 80.0 mA VCC1, VCC2 < 2.7 V Sum of IOL(peak) at P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7 10.0 mA Sum of IOL(peak) at P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_5 10.0 mA Low peak output current (80-pin package) VCC1, VCC2 ≥ 2.7 V Sum of all ports 80.0 mA VCC1, VCC2 < 2.7 V Sum of all ports 10.0 mA IOL(peak) Low peak output current VCC1, VCC2 ≥ 2.7 P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_7, P10_0 to P10_7 10.0 mA VCC1, VCC2 < 2.7 V P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_7, P10_0 to P10_7 1.0 mA IOL(avg) Low average output current (1) VCC1, VCC2 ≥ 2.7 V P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_7, P10_0 to P10_7 5.0 mA VCC1, VCC2 < 2.7 V P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_7, P10_0 to P10_7 0.5 mA f(XIN) Main clock input oscillation frequency 2.7 V ≤ V CC1 ≤ 5.5 V 1 20 MHz 1.8 V ≤ V CC1 < 2.7 V 1 10 MHz f(XCIN) Sub clock oscillation frequency 32.768 kHz f(BCLK) CPU operation clock 2.7 V ≤ V CC1 ≤ 5.5 V 20 MHz 1.8 V ≤ V CC1 < 2.7 V (Note 2) MHz 16.67 V CC1 25 [MHz] – × |
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