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AD7280ABSTZ Scheda tecnica(PDF) 14 Page - Analog Devices |
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AD7280ABSTZ Scheda tecnica(HTML) 14 Page - Analog Devices |
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14 / 48 page ![]() AD7280A Rev. 0 | Page 14 of 48 TERMINOLOGY Differential Nonlinearity (DNL) DNL is the difference between the measured and the ideal 1 LSB change between any two adjacent codes in the ADC. Integral Nonlinearity (INL) INL is the maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The endpoints of the transfer function are zero scale (a point 1 LSB below the first code transition) and full scale (a point 1 LSB above the last code transition). Offset Error Offset error applies to straight binary output coding. It is the deviation of the first code transition (000 ... 000) to (000 ... 001) from the ideal, that is, AGND + 1 LSB for AUX1 to AUX6 and 1 V + AGND + 1 LSB for VIN0 to VIN6. Offset Error Match Offset error match is the difference in zero code error across all six channels. Gain Error Gain error applies to straight binary output coding. It is the deviation of the last code transition (111 ... 110) to (111 ... 111) from the ideal (that is, 2 × VREF − 1 LSB) after adjusting for the offset error. Gain Error Match Gain error match is the difference in gain error across all six channels. ADC Unadjusted Error ADC unadjusted error includes the INL error and the offset and gain errors of the ADC and measurement channel. Total Unadjusted Error (TUE) TUE is the maximum deviation of the output code from the ideal. Total unadjusted error includes the INL error, the offset and gain errors, and the reference errors. Reference errors include the difference between the actual and ideal reference voltage (that is, 2.5 V) and the reference voltage temperature coefficient. Reference Voltage Temperature Coefficient The reference voltage temperature coefficient is derived from the maximum and minimum reference output voltage (VREF) measured between TMIN and TMAX. It is expressed in ppm/°C using the following equation: 6 10 ) ( V 5 . 2 ) ( ) ( C) (ppm/ × ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − × − = ° MIN MAX REF REF REF T T Min V Max V TCV where: VREF(Max) is the maximum VREF between TMIN and TMAX. VREF(Min) is the minimum VREF between TMIN and TMAX. TMAX = +85°C or +105°C. TMIN = −40°C. Output Voltage Hysteresis Output voltage hysteresis, or thermal hysteresis, is defined as the absolute maximum change of reference output voltage after the device is cycled through temperature from either T_HYS+ or T_HYS−, where: T_HYS+ = +25°C to TMAX to +25°C T_HYS− = +25°C to TMIN to +25°C Output voltage hysteresis is expressed in ppm using the follow- ing equation: 6 10 C) 25 ( ) ( C) 25 ( (ppm) × ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ ° − ° = REF REF REF HYS V T_HYS V V V where: VREF(25°C) = VREF at 25°C. VREF(T_HYS) is the maximum change of VREF at T_HYS+ or T_HYS−. Static Leakage Current Static leakage current is the current measured on the cell voltage and/or the auxiliary ADC inputs when the device is static, that is, not converting. Dynamic Leakage Current Dynamic leakage current is the current measured on the cell voltage and/or the auxiliary ADC inputs when the device is converting, with the static leakage current subtracted. Dynamic leakage current is specified with a convert start pulse frequency of 10 Hz, that is, every 100 ms. The dynamic leakage current for a different conversion rate can be calculated using the following equation: ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ × = ) ( ) ( A CNVST B CNVST DYN(A) DYN(B) f f I I where: IDYN(A) is the dynamic leakage current at the convert start frequency, fCNVST(A) (see Table 1). IDYN(B) is the dynamic leakage current at the desired convert start frequency, fCNVST(B). |
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