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R5F10RF8AFP Scheda tecnica(PDF) 61 Page - Renesas Technology Corp |
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R5F10RF8AFP Scheda tecnica(HTML) 61 Page - Renesas Technology Corp |
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61 / 76 page ![]() RL78/L12 2. ELECTRICAL SPECIFICATIONS (TARGET) Page 61 of 73 R01DS0157EJ0001 Rev.0.01 2012.02.20 Under development Preliminary document Specifications in this document are tentative and subject to change. Caution The pins mounted depend on the product. Refer to 1.3.1 32-pin products to 1.3.5 64-pin products. 2.7 LCD Characteristics 2.7.1 Resistance division method (1) Static display mode (TA = −40 to +85°C, VL4 (MIN.) ≤ VDD ≤ 5.5 V, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit LCD drive voltage VL4 2.0 VDD V LCD output resistor Note (Common) RODC IO = ±5 μA 40 k Ω LCD output resistor Note (Segment) ROCS IO = ±1 μA 200 k Ω (2) 1/2 bias method, 1/4 bias method (TA = −40 to +85°C, VL4 (MIN.) ≤ VDD ≤ 5.5 V, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit LCD drive voltage VL4 2.7 VDD V LCD output resistor Note (Common) RODC IO = ±5 μA 40 k Ω LCD output resistor Note (Segment) ROCS IO = ±1 μA 200 k Ω (3) 1/3 bias method (TA = −40 to +85°C, VL4 (MIN.) ≤ VDD ≤ 5.5 V, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit LCD drive voltage VL4 2.5 VDD Note2 V LCD output resistor Note1 (Common) RODC IO = ±5 μA 40 k Ω LCD output resistor Note1 (Segment) ROCS IO = ±1 μA 200 k Ω Notes 1. The output resistor is a resistor connected between one of the VL1, VL2, VL3, VL4 and VSS pins, and either of the SEG and COM pins. 2. 5.5 V (MAX) when driving a memory-type liquid crystal (the MLCDEN bit of the MLCD register = 1). |
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