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ADS4128 Scheda tecnica(PDF) 39 Page - Texas Instruments |
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ADS4128 Scheda tecnica(HTML) 39 Page - Texas Instruments |
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39 / 61 page ![]() 50 20 100 150 200 Input Frequency (MHz) SFDR (dBc) 250 300 350 500 100 180 120 140 160 200 70 65 80 60 450 400 80 75 G027 85 57 85 85 85 85 85 85 85 85 82 82 82 82 82 82 88 88 88 79 79 79 79 79 76 76 76 73 73 73 69 69 69 65 65 65 61 61 61 85 85 ADS4128 www.ti.com SBAS578 – MAY 2012 TYPICAL CHARACTERISTICS: Contour (continued) At +25°C, AVDD = 1.8 V, DRVDD = 1.8 V, maximum rated sampling frequency, sine wave input clock, 1.5-VPP differential clock amplitude, 50% clock duty cycle, –1-dBFS differential analog input, 0-dB gain, low-latency mode, DDR LVDS output interface, and 32k-point FFT, unless otherwise noted. SPURIOUS-FREE DYNAMIC RANGE (0-dB Gain) Figure 38. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Link(s): ADS4128 |
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