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AFE5808ZCF Scheda tecnica(PDF) 25 Page - Texas Instruments |
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AFE5808ZCF Scheda tecnica(HTML) 25 Page - Texas Instruments |
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25 / 68 page ![]() t 1 t 2 t 3 Device Ready for Serial Register Write Device Ready for Data Conversion Start of Clock AVDD AVDD_5V AVDD_ADC DVDD RESET SEN CLKP_ADC t 4 t 7 t 8 t 6 t 5 AFE5808 www.ti.com SLOS688C – SEPTEMBER 2010 – REVISED APRIL 2012 10µs < t1 < 50ms, 10µs < t2 < 50ms, –10ms < t3 < 10ms, t4 > 10ms, t5 > 100ns, t6 > 100ns, t7 > 10ms, and t8 > 100µs. The AVDDx and DVDD power-on sequence does not matter as long as –10 ms < t3 < 10 ms. Similar considerations apply while shutting down the device. Figure 61. Recommended Power-up Sequencing and Reset Timing Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Link(s): AFE5808 |
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