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CXD3017Q Scheda tecnica(PDF) 5 Page - Sony Corporation |
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CXD3017Q Scheda tecnica(HTML) 5 Page - Sony Corporation |
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5 / 117 page ![]() – 5 – CXD3017Q Pin No. Symbol I/O Output values Description Test pin. Normally, GND. Test pin. Normally, GND. Crystal selection input. Low when the crystal is 16.9344MHz; high when the crystal is 33.8688MHz. Center voltage input. Focus error signal input. Sled error signal input. Tracking error signal input. Center servo analog input. RF signal input. Test pin. No connected. Analog GND. Operational amplifier constant current input. Analog power supply. EFM full-swing output. (low = Vss, high = VDD) Asymmetry comparator voltage input. Asymmetry circuit constant current input. EFM signal input. Analog GND. Multiplier VCO1 control voltage input. Master PLL filter output. (slave = digital PLL) Master PLL filter input. Master PLL charge pump output. Analog power supply. Digital GND. Digital power supply. Digital Out output. D/A interface. LR clock output f = Fs. D/A interface. Serial data output. (two's complement, MSB first) D/A interface. Bit clock output. Outputs a high signal when the playback disc has emphasis, and a low signal when there is no emphasis. Master clock power supply. Crystal oscillation circuit input. Master clock is externally input from this pin. Crystal oscillation circuit output. Master clock GND. Analog — — 1, 0 — Analog 1, Z, 0 — — — 1, 0 1, 0 1, 0 1, 0 1, 0 — — I I I I I I I I I O — I — O I I I — I O I O — — — O O O O O — I O — TEST TES1 XTSL VC FE SE TE CE RFDC ADIO AVSS0 IGEN AVDD0 ASYO ASYI BIAS RFAC AVSS3 CLTV FILO FILI PCO AVDD3 VSS VDD DOUT LRCK PCMD BCK EMPH XVDD XTAI XTAO XVSS 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 |
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