AD7722

–6–

REV. 0

t

15

t

16

DOE

SDO

Figure 5. Serial Mode Timing for Data Output Enable and Serial Data Output (TSI = Logic Low)

t

23

RD

DB0 – DB15

t

22

VALID DATA

CS

DRDY

Figure 6. Parallel Mode Read Timing

CLKIN

DVAL

DRDY

SYNC, RESET

Figure 7. SYNC and RESET Timing, Serial and Parallel Mode

CLKIN

DVAL

DRDY

CAL

Figure 8. Calibration Timing, Serial and Parallel Mode