AD7722AS datasheet(21/24 Pages) AD

21 / 24 page

AD7722

–21–

REV. 0

A minimum etch technique is generally best for ground planes

because it gives the best shielding. Noise can be minimized by

paying attention to the system layout and preventing different

signals from interfering with each other. High level analog

signals should be separated from low level analog signals, and

both should be kept away from digital signals. In waveform

sampling and reconstruction systems, the sampling clock

(CLKIN) is as vulnerable to noise as any analog signal. CLKIN

should be isolated from the analog and digital systems. Fast

switching signals like clocks should be shielded with their

associated ground to avoid radiating noise to other sections of

the board, and clock signals should never be routed near the

analog inputs.

Avoid running digital lines under the device as these will couple

noise onto the die. The analog ground plane should be allowed

to run under the AD7722 to shield it from noise coupling. The

power supply lines to the AD7722 should use as large a trace as

possible (preferably a plane) to provide a low impedance path

and reduce the effects of glitches on the power supply line.

Avoid crossover of digital and analog signals. Traces on opposite

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

44-Pin PQFP

(S-44)

0.557 (14.15)

0.537 (13.65)

TOP VIEW

(PINS DOWN)

0.033 (0.84)

0.029 (0.74)

0.398 (10.10)

0.390 (9.90)

0.018 (0.45)

0.012 (0.30)

0.083 (2.11)

0.077 (1.96)

0.040 (1.02)

0.032 (0.81)

0.040 (1.02)

0.032 (0.81)

SEATING

PLANE

0.096 (2.44)

MAX

0.037 (0.95)

0.026 (0.65)

sides of the board should run at right angles to each other. This

will reduce the effects of feedthrough through the board.

AVDD1

AGND1

AVDD

AGND

AVDD

AGND

DVDD

DGND

100nF

1nF

Ω

100µF

10µF

100µF

100nF

10µF

+5V

Figure 44. Power Supply Decoupling

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